1. Field of Invention
The present invention relates to a chip module and its manufacturing method and, in particular, to a semiconductor chip module and a manufacturing method thereof.
2. Related Art
As the electronic products tend to be smaller and have high efficiency, the capacity and the performance of the semiconductor circuit are enhanced to meet the users' needs during development. Thus, a multi-chip module becomes one of the focus researches in recent years. It is a semiconductor chip module package formed with a plurality of chips by stacking, such that the chips with different functions may be integrated into one semiconductor chip module package.
FIG. 1 is a schematic view of a conventional semiconductor module package 1 having a plurality of stacked chips. With reference to FIG. 1, the semiconductor chip module package 1 includes a substrate 11, a chip 12, a spacer 13, a chip 14, a molding gel 15, and a plurality of wires W. The chip 12 is disposed on the substrate 11 and electrically connected to the substrate 11 by wire bonding. The spacer 13 is a substrate and disposed between two chips 12 and 14. It can electrically isolate the two chips 12 and 14 and maintains the wire-bonding area on the chip 12. Furthermore, the molding gel 15 covers the wires W for protection.
The chips 12 and 14 are electrically connected and stacked to each other by wire bonding. However, the size of the bonding head is large and the disposition of the wires W needs a certain height and distance, such that the spacer 13 is needed to increase the height and the distance between the chips 12 and 14 so to facilitate the movement of the bonding head and the disposition of the wires W. Nonetheless, it also reduces the integration of the semiconductor chip module package 1. Besides, the chips 12 and 14 will take the bonding force as the bonding head implements wire bonding, thus the thicknesses of the chips 12 and 14 have to be large enough to prevent damage (e.g. the chip thickness cannot be smaller than 50 μm), such that the size of the stacked semiconductor chip module package 1 may not be further reduced.
In addition, since the chips 12 and 14 are electrically connected by wire bonding, they may be electrically connected to the substrate 11 after stacking. That is, they cannot be separately wire-bonded on the substrate 11 and then stacked. This reduces the adaptability of the manufacturing process and extends the manufacturing time. Additionally, the yield and the reliability of the product may be reduced since the wires in the wire-bonded products may be easily broken, which results in the malfunctions of the products.
Therefore, it is an important subject to provide a semiconductor chip module that is manufactured by a different stacking method for further reducing its size, increasing the adaptability of the manufacturing process, and enhancing the yield and reliability of the product.